The present invention relates generally to memory devices and in particular the present invention relates to non-volatile memory and data access.
A Flash memory is a type of memory that can be erased and reprogrammed in blocks instead of one byte at a time. A typical Flash memory comprises a memory array, which includes a large number of memory cells. Each of the memory cells includes a floating gate field-effect transistor capable of holding a charge. The cells are usually grouped into blocks. Each of the cells within a block can be electrically programmed in a random basis by charging the floating gate. The charge can be removed from the floating gate by a block erase operation. The data in a cell is determined by the presence or absence of the charge in the floating gate.
Similar to random access memory devices, synchronous flash memory devices have memory cells that are typically arranged in an array of rows and columns. During operation, a row (page) is accessed and then memory cells can be randomly accessed on the page by providing column addresses. This access mode is referred to as page mode access. To read or write to multiple column locations on a page requires the external or internal application of multiple column addresses.
The synchronous flash memory devices can be used in new generations of handheld products. These products include handheld personal digital assistants (PDA""s) as well as some cell phones. The need for lower power and higher performance is essential in these types of applications.
Flash devices have historically had several current usage specifications. The active current, or ICC Active, is the current consumption level of the memory device when the part is being accessed either for reading or writing operations. These currents range from 40 to 100 mA for different flash memory families. Then there is the Standby current. This current refers to the level of current when the memory is not enabled. For example, the standby current is a mode in which the CE, or chip enable, pin is de-asserted. A typical current consumption of the standby state is in the range of 100 to 400 xcexcA. Most flash memory devices have a lower power mode, which is referred to as deep power down. The current consumption of this mode is in the 10""s of xcexcA range. Reading data from the memory device following the termination of a deep power down state requires a relatively long wait.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a non-volatile memory device that can conserve power without slowing data access.
The above-mentioned problems with non-volatile memory devices and other problems are addressed by the present invention and will be understood by reading and studying the following specification.
In one embodiment, a synchronous memory device comprises a memory array, latch circuitry coupled to store data read from the memory array, and control circuitry to receive an externally provided command to place the synchronous memory device in a low power consumption mode. The synchronous memory device maintains power to the latch circuitry during the low power consumption mode.
In another embodiment, a flash memory device comprises an array of non-volatile memory cells arranged in rows and columns, latch circuitry coupled to store data read from a row of the memory array, and control circuitry to place the memory device in a low power mode by decoupling power to the array. The memory device maintains power to the latch circuitry during the low power mode, and the control circuitry allows the stored data in the latch circuitry to be read by an external device following a termination of the low power mode.
A method of operating a flash memory device comprises accessing a page of data of a memory array, latching the accessed page, and powering down the flash memory device to a low power state. A voltage pump provided to generate all elevated access voltage is turned off. The method further comprises powering up the flash memory device such that the voltage pump is turned on. The voltage pump requires X seconds to reach a stable pumped output voltage. The latched page is read during the X seconds and prior to the voltage pump reaching a stable pumped output voltage.